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Qorvo has raised the bar in the field of circuit simulation with the release of QSPICE. The software’s designed to enhance the design productivity of power and analog device designers by offering improved simulation speed, functionality and reliability.
Qorvo’s QSPICE is offered free of charge and readily available for download on the official QSPICE website.
Today, PowerElectronicsNews.com will launch a tutorial on QSPICE consisting of multiple articles that explain this tool in detail and provide schematic examples.
One of the key features of QSPICE is its ability to simulate both power and analog circuits, as well as complex digital circuits and algorithms. This mixed-mode simulation capability makes it a valuable tool for addressing the increasingly complex hardware and software challenges faced by system designers today.
Jeff Strang, general manager for Qorvo’s Power Management business, highlighted in the press release that QSPICE enables a new generation of mixed-mode circuit simulation. In the past, power designers typically relied on analog circuits and silicon power switches.
However, with advancements in technology, digital control and compound semiconductors are now common elements in advanced power designs. QSPICE is well-suited for innovation in fields like developing AI algorithms for electric vehicle (EV) battery charging, optimizing Qorvo pulsed-radar power supplies, and evaluating the latest silicon carbide FETs.
In an exclusive interview with EE Times, Mike Engelhardt, QSPICE creator at Qorvo, said that during the closed beta period, they’ve particularly extended the technology used in the implementation of the lexicon and grammar of QSPICE to support pretty much any weird syntax you find off the web.
“Before beta, QSPICE was mostly table-driven parsing but with some procedure driven parsing. Procedure is easier to implement but harder to work on. Today, QSPICE is almost exclusively table driven so that the lexicon and grammar could be extended to the point it is today,” Engelhardt said. “It’s a very fast-moving development. We have other very ambitious projects in queue, but we don’t pre-announce such features/capability since the level of technical risks of ambitious projects makes scheduling ineffective.”
Over the course of three years, significant efforts have been dedicated to enhancing the performance and accuracy of Berkeley SPICE, according to Engelhardt. The main areas of focus include:
- Eliminating device IV curve discontinuities: Improvements have been made to ensure smooth and continuous current-voltage (IV) characteristics for devices in SPICE simulations, leading to better accuracy and stability.
- Straightening out Newton and timestep iteration: Algorithms for solving circuit equations, such as Newton-Raphson iteration and timestep control, have been refined to achieve faster convergence and reduce simulation time.
- Correcting hash and string table implementation: The data structures used in SPICE’s lexicon, such as hash tables and string tables, have been optimized to enhance search and retrieval operations during simulation.
- Correcting errors in FET channel equations: The equations used to model field-effect transistors (FETs) have been rectified to improve the accuracy of SPICE simulations involving FET devices.
- Implementing cascode SiC FET as a native circuit element: Support for cascode silicon carbide (SiC) FETs has been added as a built-in element in SPICE, boosting simulation accuracy and efficiency for circuits using this component.
- Correcting stochastic noise computation: Errors in modeling and computing stochastic noise in circuits have been addressed to improve the accuracy of noise-sensitive SPICE simulations.
- Implementing charge-conserving Yang-Chatterjee charge model for MOSFETs: The Yang-Chatterjee charge model has been integrated into SPICE to provide a more accurate representation of charge behavior in metal-oxide-semiconductor FETs (MOSFETs).
- Enhancing error control for differential equations: Problems in handling errors that arise during the integration of differential equations, particularly those related to reactances, have been resolved to enhance simulation reliability.
- Rearchitecting timestep control: A complete overhaul of SPICE’s timestep control mechanism has been carried out to achieve an optimal balance between simulation accuracy and efficiency.
- Transitioning to multiple processes for improved memory management: The move from a multi-threaded approach to multiple processes has improved memory management and cache utilization, resulting in overall performance gains for compute-bound tasks.
These combined numerical methods and computing hardware optimizations have significantly improved the capabilities of Berkeley SPICE, making it a more robust and efficient tool for electronic circuit simulation.
A leap forward in analog simulation technology
Qorvo’s QSPICE introduces a paradigm shift in analog simulation technology, empowering designers to explore uncharted territories in power management and analog circuits. In the past, power designers were largely reliant on analog circuits and silicon power switches.
However, with the rapid advancement of technology, the inclusion of digital control and compound semiconductors in sophisticated power designs has become common. QSPICE is arising to meet this challenge, providing a seamless platform for simulating complex digital circuits and algorithms alongside traditional analog circuits.
A toolbox for complex hardware and software challenges
As technology becomes increasingly intricate, system designers face a myriad of complex hardware and software challenges. QSPICE rises to the occasion, offering mixed-mode simulation capabilities that allow designers to address these intricate problems with ease.
From developing AI algorithms for EV battery charging to optimizing Qorvo pulsed-radar power supplies and evaluating state-of-the-art SiC FETs, QSPICE opens doors to new possibilities. It proves to be the perfect platform for innovation in the ever-evolving landscape of power and analog design.
QSPICE’s inclusion of SiC JFETs and cascode FETs as native circuit elements brings several benefits to the simulation process, including:
- Improved simulation speed: By representing SiC JFETs and cascode FETs as native circuit elements, the internal circuitry of these devices can be combined into equivalent circuits with fewer nodes. This simplification reduces the complexity of the circuit being simulated, leading to faster simulation times.
- Enhanced robustness: Simplifying the representation of these specialized devices as native circuit elements can lead to more stable and robust simulations. Fewer nodes and simpler equivalent circuits can reduce numerical errors and potential convergence issues, improving the overall reliability of the simulation results.
- Accurate representation: Since SiC JFETs and cascode FETs are crucial components in modern electronic circuits, having them as native elements allows for a more accurate representation of their behavior during simulation. This accuracy is essential for designers to make informed decisions about circuit performance.
- Seamless integration: Native circuit elements seamlessly integrate with the rest of the QSPICE simulation engine, leveraging the existing algorithms and optimizations to efficiently handle these devices. This integration ensures smooth simulation workflows without the need for additional external models.
Overall, the integration of SiC JFETs and cascode FETs as native circuit elements in QSPICE demonstrates a commitment to providing a comprehensive and efficient simulation platform for electronic circuit design, benefiting circuit designers by offering faster simulations and more accurate results.
According to Qorvo, QSPICE also comes with numerous enhancements that outshine traditional analog modeling tools, including:
- Support for advanced analog and digital system simulations: QSPICE goes beyond traditional analog simulation, making it suitable for complex AI and machine-learning applications. This versatility enables designers to explore new frontiers in circuit design.
- Advanced simulation engine: The upgraded simulation engine employs state-of-the-art numerical methods, optimizing it for modern computing hardware. With a GPU-rendered user interface and SSD-aware memory management, QSPICE delivers significantly higher simulation speed and accuracy, elevating the design experience.
- Reduced runtimes and a 100% completion rate: In benchmark tests, QSPICE demonstrated reduced runtimes and a remarkable 100% completion rate when subjected to a suite of challenging test circuits. In contrast, popular SPICE simulators experienced failure rates of up to 15% under similar conditions.
- Regularly updated QSPICE model library: To further enhance the user experience, QSPICE provides a constantly updated model library featuring Qorvo’s SiC and advanced power management solutions. This resource empowers designers to explore and design with Qorvo’s cutting-edge power technologies effortlessly.
QSPICE’s mixed-mode simulation capabilities enables engineers to seamlessly integrate and simulate complex digital algorithms alongside analog circuits. With QSPICE, engineers can code digital algorithms in C++ or Verilog and present them as test vectors for SPICE simulations. This mixed-mode simulation approach allows for the verification of digital algorithms, evaluation of system behavior, and provides flexibility in handling complex designs.
However, engineers should be aware of potential limitations and considerations, such as the need for careful modeling and verification of digital algorithms to ensure accurate and reliable simulation results.
QSPICE assists engineers in tackling power integrity and noise analysis challenges in modern power management and mixed-signal designs, according to Engelhardt. The tool allows the simulation of interconnection parasitic impedances using extracted netlists from third-party tools or through QSPICE’s own computation based on dimension and metal alloy information. This capability helps engineers analyze power integrity and noise in high-frequency applications.
Additionally, QSPICE addresses the unique simulation challenges associated with wide-bandgap (WBG) semiconductors like SiC and gallium nitride (GaN). It extends the device equations to simulate GaN and SiC as native circuit elements, considering aspects like gate leakages, subthreshold conduction and linear regions for accurate representation.
Moreover, QSPICE introduces a new capability to differentiate between displacement currents and dissipation currents, enabling detailed and accurate reporting of power dissipation in devices, which is crucial for thermal considerations in cutting-edge materials.
Overall, QSPICE provides comprehensive tools to handle power integrity, noise simulation and address the complexities of WBG semiconductor materials, supporting engineers in designing and optimizing advanced electronic circuits.